As has been well known, a phase locked loop (PLL) comprises a voltage controlled oscillator (VCO), a phase detector, a loop filter and a divider. An output of the phase detector is supplied to an oscillation control input terminal of the voltage controlled oscillator (VCO) via the loop filter, and a stable reference signal is supplied to one input terminal of the phase detector. On the other hand, an output signal of the voltage controlled oscillator (VCO) is fed back to the other input terminal of the phase detector via the divider. It is thus possible to stabilize the output frequency of the voltage controlled oscillator (VCO) with respect to a change in temperature, a variation with time, a variation in power source, etc. The output signal of the VCO can hence be used as a stable clock signal or the like for a semiconductor integrated circuit.
For example, a PLL built in a semiconductor integrated circuit mounted in a disk recording/reproducing device, which accesses recording media such as hard disk (HDD), a compact disk (CD), a digital video disk (DVD), a blue-ray disk (BD), etc., generates a clock signal for determining an access speed of the recording medium and generates a clock signal for determining a data transfer rate at an interface between a host device such as a personal computer and the semiconductor integrated circuit.
There is thus a need for a calibration function for adjusting the characteristic of the PLL at the time of shipment of the semiconductor integrated circuit or at a calibration operating period or the like just before a normal operation in such a manner that the PLL built in the semiconductor integrated circuit satisfies a desired characteristic.
Particularly in a semiconductor integrated circuit such as an analog-digital mixed-signal processing LSI (hereinafter called “ana-digi mixed LSI”) or the like, a voltage controlled oscillator (VCO) corresponding to an analog circuit needs to keep frequency control sensitivity relatively low for the purpose of generating an output signal of a high frequency and reducing frequency jitter.
Further, the general-purpose ana-digi mixed LSI needs to suppress fluctuations in manufacturing process for the purpose of manufacturing it on a mass production line. For example, the ana-digi mixed LSI is equipped with a PLL for the purpose of generating an operation clock for a logic circuit and generating a transmit signal clock. An analog circuit such as a voltage controlled oscillator (VCO) or the like included in this PLL greatly varies in characteristic due to fluctuations in manufacturing process. Particularly, when an operating environment large in temperature change is estimated or considered as in a case where a manufacturing process such as a miniaturizing process or the like fluctuates greatly, a case where the analog circuit is used as an automobile mounting part, etc., there is a case where the voltage controlled oscillator (VCO) or the like included in the PLL cannot satisfy a desired characteristic. Thus, various proposals for bringing the voltage controlled oscillator (VCO) of the PLL to the desired characteristic have heretofore been carried out.
First, a patent document 1 describes that a control voltage for controlling an oscillation frequency of a voltage controlled oscillator (VCO) is supplied to its corresponding gate of a conversion MOS transistor of a voltage-current converter in an operation current control unit, which converts the control voltage to an operating current of a ring oscillator, and a drain current of the conversion MOS transistor is supplied to an input terminal of a current mirror to thereby determine the operating current of the ring oscillator according to the current at an output terminal of the current mirror. A conversion resistor between the source of the conversion MOS transistor and a ground potential can be selected to a low resistance and a high resistance. When the low resistance is selected for the conversion resistor, the operating current of the ring oscillator assumes a large value in response to a predetermined control voltage, so that an oscillation signal of a high frequency can be generated. When the high resistance is selected as for the conversion resistor on the contrary, the operating current of the ring oscillator assumes a small value in response to the predetermined control voltage, so that an oscillation signal of a low frequency can be generated. Further, the patent document 1 also has described that such another resistor that even though the control voltage is zero volt, the operating current of the ring oscillator becomes a micro or minimal value and the ring oscillator oscillates at an extremely low frequency, is coupled between the input terminal of the current mirror of the voltage-current converter and the ground potential.
Even in the case of a patent document 2, a control voltage is supplied to its corresponding gate of a conversion MOS transistor of a voltage-current converter, and a drain current of the conversion MOS transistor is supplied to an input terminal of a current mirror, thereby determining an operating current of a ring oscillator of a voltage controlled oscillator (VCO) according to a current from an output terminal of the current mirror. Further, the patent document 2 describes the solution of a problem that due to a low breakdown voltage of each MOS transistor by a miniaturized manufacturing process, frequency control sensitivity of an oscillation frequency vs control voltage at the conversion MOS transistor of the voltage-current converter for generating the operating current of the ring oscillator increases, so that a jitter characteristic is degraded. In order to solve this problem, the patent document 2 also describes that another current mirror circuit such that even though the control voltage is zero volt, the operating current of the ring oscillator becomes a minimal value and the ring oscillator oscillates at an extremely low frequency, is coupled between an input terminal of the current mirror of the voltage-current converter and a ground potential.
Further, a patent document 3 also describes in a manner similar to the patent document 2 that an offset current addition circuit such that even though a control voltage is zero volt at a voltage controlled oscillator (VCO), an operating current of a ring oscillator becomes a minimal value and the ring oscillator oscillates at an extremely low frequency, is coupled between an input terminal of a current mirror of a voltage-current converter and a ground potential. However, the voltage-current converter described in the patent document 3 is used as a differential voltage-current converter and larger in the number of elements than the voltage-current converter described in the patent document 2.
[Patent Document 1] Japanese Unexamined Patent Publication No. 2003-152507
[Patent Document 2] Japanese Unexamined Patent Publication No. 2007-129501
[Patent Document 3] Japanese Unexamined Patent Publication No. 2003-229764